Keynote 312/7/2018 10:12:33 AM
- Keynote 3
Energy-Quality Scalable Integrated Systems - Preserving Energy
Downscaling in the Decade Ahead
ECE - National University of Singapore
Email: email@example.com, firstname.lastname@example.org
The historical 100X/decade energy down-scaling is currently being threatened by the end of Moore’s law, and the limited prospective energy gains from approaches that have been already exploited extensively (e.g., heterogeneous systems, ultra-low voltage, parallelism). Major shifts from traditional sensing/processing paradigms are now mandatory, and new design dimensions and tradeoffs that enable further energy reductions need to be explored.
In this talk, energy-quality (EQ) scalable circuits and systems are introduced as a viable direction to continue the historical exponential energy down-scaling. EQ-scalable systems dynamically and explicitly trade off energy and quality from sensor to circuit, architecture, algorithm, and up to system level. Recent and novel approaches are discussed to minimize the energy at run time, based on the actual quality target that is set by the specific task, the context, and the specific dataset at hand. In this talk, quality is treated as an explicit knob, eliminating the quality slack that is traditionally imposed by worst-case design across different applications, contexts, datasets, and the pessimistic design margin to counteract process/voltage/temperature variations. Interesting convergence with machine learning and other important applications is discussed to provide an insight into the inter-dependence of algorithms, architectures and circuits. Several silicon demonstrations are illustrated to quantify the benefits offered by energy-quality scaling, and to identify the challenges that need to be solved to fulfill its potential.
Massimo Alioto is Associate Professor at the ECE Department of the National University of Singapore, where he leads the Green IC group and the Integrated Circuits and Embedded Systems area. Previously, he held positions at the University of Siena, Intel Labs – CRL (2013), University of Michigan - Ann Arbor (2011-2012), University of California – Berkeley (2009-2011), EPFL - Lausanne.
He is (co)author of 250+ publications on journals and conference proceedings, and three books with Springer. His primary research interests include ultra-low power VLSI circuits and systems, self-powered systems, near-threshold circuits for green computing, widely energy-scalable integrated systems, hardware security, and circuit techniques for emerging technologies.
He is the Editor in Chief of the IEEE Transactions on VLSI Systems (2019-2020), and Deputy Editor in Chief of the IEEE Journal on Emerging and Selected Topics in Circuits and Systems (2018). Prof. Alioto was the Chair of the “VLSI Systems and Applications” Technical Committee of the IEEE CASS (2010-2012), Distinguished Lecturer (2009-2010), and members of the Board of Governors (2015-2020). He served as Guest Editor of numerous journal special issues, Technical Program Chair of several IEEE conferences (ISCAS 2022, SOCC, PRIME, ICECS, VARI, NEWCAS, ICM), and TPC member (ISSCC, ASSCC). Prof. Alioto is an IEEE Fellow.